{"id":1256,"date":"2020-11-23T11:57:03","date_gmt":"2020-11-23T11:57:03","guid":{"rendered":"http:\/\/learnlearn.uk\/alevelcs\/?page_id=1256"},"modified":"2023-06-03T23:38:08","modified_gmt":"2023-06-03T23:38:08","slug":"sisd-simd-misd-mimd","status":"publish","type":"page","link":"https:\/\/learnlearn.uk\/alevelcs\/sisd-simd-misd-mimd\/","title":{"rendered":"SISD,SIMD,MISD,MIMD"},"content":{"rendered":"<div class=\"responsive-tabs\">\n<h2 class=\"tabtitle\">Video<\/h2>\n<div class=\"tabcontent\">\n\n<h3>Flynn&#8217;s Classification Video<\/h3>\n<p><iframe loading=\"lazy\" title=\"YouTube video player\" src=\"https:\/\/www.youtube.com\/embed\/KVOc6369-Lo\" width=\"800\" height=\"600\" frameborder=\"0\" allowfullscreen=\"allowfullscreen\"><\/iframe><\/p>\n<p><a href=\"https:\/\/drive.google.com\/file\/d\/1MekLMRr46nmcdPol2Hp-qthZIm9ZPhXq\/view?usp=sharing\">Can&#8217;t Access YouTube? Click here for the Google Drive Version<\/a><\/p>\n\n<\/div><h2 class=\"tabtitle\">SISD<\/h2>\n<div class=\"tabcontent\">\n\n<h3>Single Instruction Single Data<\/h3>\n<div id=\"attachment_1257\" style=\"width: 410px\" class=\"wp-caption alignright\"><a href=\"https:\/\/en.wikipedia.org\/wiki\/Flynn%27s_taxonomy\"><img aria-describedby=\"caption-attachment-1257\" decoding=\"async\" loading=\"lazy\" class=\"size-full wp-image-1257\" src=\"https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/sisd.png\" alt=\"\" width=\"400\" height=\"400\" srcset=\"https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/sisd.png 400w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/sisd-150x150.png 150w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/sisd-300x300.png 300w\" sizes=\"(max-width: 400px) 100vw, 400px\" \/><\/a><p id=\"caption-attachment-1257\" class=\"wp-caption-text\">SISD Architecture Diagram. Source: Wikipedia<\/p><\/div>\n<p>The original Von Neumann Architecture that does not employ any kind of parallelism. The sequential processor takes data from a single address in memory and performs a single instruction on the data. All single processor systems are SISD.<\/p>\n<p><strong>Common usage<\/strong><\/p>\n<ul>\n<li>Older Computers<\/li>\n<li>Microcontrollers<\/li>\n<\/ul>\n<p><strong>Advantages<\/strong><\/p>\n<ul>\n<li>Low power requirements as only a single core<\/li>\n<li>Simpler architecture than others therefore cheaper and easier to manufacture<\/li>\n<\/ul>\n<p><strong>Disadvantages<\/strong><\/p>\n<ul>\n<li>Speed of the system limited due to it being a single core<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n\n<\/div><h2 class=\"tabtitle\">SIMD<\/h2>\n<div class=\"tabcontent\">\n\n<h3>Single Instruction Multiple Data<\/h3>\n<div id=\"attachment_1259\" style=\"width: 405px\" class=\"wp-caption alignright\"><img aria-describedby=\"caption-attachment-1259\" decoding=\"async\" loading=\"lazy\" class=\" wp-image-1259\" src=\"https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/simd.png\" alt=\"\" width=\"395\" height=\"395\" srcset=\"https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/simd.png 1024w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/simd-150x150.png 150w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/simd-300x300.png 300w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/simd-768x768.png 768w\" sizes=\"(max-width: 395px) 100vw, 395px\" \/><p id=\"caption-attachment-1259\" class=\"wp-caption-text\">SIMD Architecture Diagram. Source: Wikipedia<\/p><\/div>\n<p>&nbsp;<\/p>\n<p>A single instruction is executed on multiple different data streams. These instructions can be performed sequentially, taking advantage of pipelining, or in parallel using multiple processors. Modern GPUs, containing Vector processors and array processors, are commonly SIMD systems.<\/p>\n<p><strong>Common usage<\/strong><\/p>\n<ul>\n<li>Graphics Processing Units when performing vector and array operations.<\/li>\n<li>Scientific processing<\/li>\n<\/ul>\n<p><strong>Advantages<\/strong><\/p>\n<ul>\n<li>Very efficient where you need to perform the same instruction on large amounts of data.<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n\n<\/div><h2 class=\"tabtitle\">MISD<\/h2>\n<div class=\"tabcontent\">\n\n<h3>Multiple Instruction Single Data<\/h3>\n<div id=\"attachment_1258\" style=\"width: 413px\" class=\"wp-caption alignright\"><img aria-describedby=\"caption-attachment-1258\" decoding=\"async\" loading=\"lazy\" class=\"wp-image-1258\" src=\"https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/misd.png\" alt=\"\" width=\"403\" height=\"403\" srcset=\"https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/misd.png 1024w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/misd-150x150.png 150w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/misd-300x300.png 300w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/misd-768x768.png 768w\" sizes=\"(max-width: 403px) 100vw, 403px\" \/><p id=\"caption-attachment-1258\" class=\"wp-caption-text\">MISD Architecture Diagram. Source Wikipedia<\/p><\/div>\n<p>In this architecture multiple instructions are performed on a single data stream. An uncommon type commonly used for fault tolerance. Different systems perform operations on the data and all the results must agree. Used on flight control systems where fault detection is critical.<\/p>\n<p><strong>Common Usage<\/strong><\/p>\n<ul>\n<li>Not used commercially.<\/li>\n<li>Some specific use systems (space flight control)<\/li>\n<\/ul>\n<p><strong>Advantages<\/strong><\/p>\n<ul>\n<li>Excellent for situation where fault tolerance is critical<\/li>\n<\/ul>\n<div class=\"mceTemp\"><\/div>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n\n<\/div><h2 class=\"tabtitle\">MIMD<\/h2>\n<div class=\"tabcontent\">\n\n<h3>Multiple Instruction Multiple Data<\/h3>\n<div id=\"attachment_1260\" style=\"width: 369px\" class=\"wp-caption alignright\"><a href=\"https:\/\/en.wikipedia.org\/wiki\/Flynn%27s_taxonomy#\/media\/File:MIMD.svg\"><img aria-describedby=\"caption-attachment-1260\" decoding=\"async\" loading=\"lazy\" class=\" wp-image-1260\" src=\"https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/mimd.png\" alt=\"\" width=\"359\" height=\"359\" srcset=\"https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/mimd.png 1024w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/mimd-150x150.png 150w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/mimd-300x300.png 300w, https:\/\/learnlearn.uk\/alevelcs\/wp-content\/uploads\/sites\/20\/2020\/11\/mimd-768x768.png 768w\" sizes=\"(max-width: 359px) 100vw, 359px\" \/><\/a><p id=\"caption-attachment-1260\" class=\"wp-caption-text\">MIMD Architecture Diagram. Source: Wikipedia<\/p><\/div>\n<p>Multiple autonomous processors perform operations on difference pieces of data, either independently or as part of shared memory space.<\/p>\n<p><strong>Common Usage<\/strong><\/p>\n<ul>\n<li>Most modern\u00a0 desktop \/ laptop \/ mobile processors are MIMD processors.<\/li>\n<\/ul>\n<p><strong>Advantages<\/strong><\/p>\n<ul>\n<li>Great for situations where you need to perform a variety of processor and data intensive tasks (such as video editing, game rendering)<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n\n<\/div><h2 class=\"tabtitle\">Resources &amp; Quiz<\/h2>\n<div class=\"tabcontent\">\n\n<p><a href=\"https:\/\/www.aicurriculum.co.uk\/resources\/695a2923-3514-48c9-b1cb-2afcef549080#\">AI Assisted Revision Resource<\/a><\/p>\n<p><a href=\"https:\/\/docs.google.com\/presentation\/d\/1aGTL2DNXcgd0RrH5G2OZrcyQdhjoOlAh4hEvhm0Z0hc\/edit?usp=sharing\">Teacher Presentation<\/a><\/p>\n<p><a href=\"https:\/\/www.tes.com\/teaching-resource\/resource-12627201\">Topic Worksheet<\/a><\/p>\n<p><a href=\"https:\/\/www.tutorialspoint.com\/concurrency_in_python\/concurrency_in_python_system_and_memory_architecture.htm\">Advantages &amp; Disadvantages<\/a><\/p>\n<p><a href=\"https:\/\/www.sciencedirect.com\/topics\/computer-science\/single-instruction-single-data#:~:text=Dominant%20representative%20SISD%20systems%20are,%2Ddata%20(SISD)%20architecture.\">More Information<\/a><\/p>\n<p><a href=\"https:\/\/quizizz.com\/admin\/quiz\/60836c7210e9df001b801fea\">Test yourself with this Quizizz!<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n<\/div><\/div>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Flynn&#8217;s Classification Video Can&#8217;t Access YouTube? Click here for the Google Drive Version Single Instruction Single Data The original Von Neumann Architecture that does not employ any kind of parallelism. The sequential processor takes data from a single address in memory and performs a single instruction on the data. All single processor systems are SISD.&hellip;&nbsp;<a href=\"https:\/\/learnlearn.uk\/alevelcs\/sisd-simd-misd-mimd\/\" class=\"\" rel=\"bookmark\">Read More &raquo;<span class=\"screen-reader-text\">SISD,SIMD,MISD,MIMD<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"neve_meta_sidebar":"","neve_meta_container":"","neve_meta_enable_content_width":"off","neve_meta_content_width":70,"neve_meta_title_alignment":"","neve_meta_author_avatar":"","neve_post_elements_order":"","neve_meta_disable_header":"","neve_meta_disable_footer":"","neve_meta_disable_title":""},"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v20.6 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>SISD,SIMD,MISD,MIMD - A Level Computer Science<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/learnlearn.uk\/alevelcs\/sisd-simd-misd-mimd\/\" \/>\n<meta property=\"og:locale\" content=\"en_GB\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"SISD,SIMD,MISD,MIMD - A Level Computer Science\" \/>\n<meta property=\"og:description\" content=\"Flynn&#8217;s Classification Video Can&#8217;t Access YouTube? Click here for the Google Drive Version Single Instruction Single Data The original Von Neumann Architecture that does not employ any kind of parallelism. The sequential processor takes data from a single address in memory and performs a single instruction on the data. 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Click here for the Google Drive Version Single Instruction Single Data The original Von Neumann Architecture that does not employ any kind of parallelism. The sequential processor takes data from a single address in memory and performs a single instruction on the data. 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Click here for the Google Drive Version Single Instruction Single Data The original Von Neumann Architecture that does not employ any kind of parallelism. The sequential processor takes data from a single address in memory and performs a single instruction on the data. All single processor systems are SISD.&hellip;&nbsp;Read&hellip;","_links":{"self":[{"href":"https:\/\/learnlearn.uk\/alevelcs\/wp-json\/wp\/v2\/pages\/1256"}],"collection":[{"href":"https:\/\/learnlearn.uk\/alevelcs\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/learnlearn.uk\/alevelcs\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/learnlearn.uk\/alevelcs\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/learnlearn.uk\/alevelcs\/wp-json\/wp\/v2\/comments?post=1256"}],"version-history":[{"count":16,"href":"https:\/\/learnlearn.uk\/alevelcs\/wp-json\/wp\/v2\/pages\/1256\/revisions"}],"predecessor-version":[{"id":2309,"href":"https:\/\/learnlearn.uk\/alevelcs\/wp-json\/wp\/v2\/pages\/1256\/revisions\/2309"}],"wp:attachment":[{"href":"https:\/\/learnlearn.uk\/alevelcs\/wp-json\/wp\/v2\/media?parent=1256"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}